1. Field of the Invention
The present invention relates to a digital driver for display devices. The invention further relates to a display device including the digital driver according to the invention. Further, as the display medium of the display device including the digital driver according to the invention, liquid crystal, organic EL or the like can be used.
2. Description of the Related Art
Recently, the technique of fabricating a semiconductor device such as, e.g., thin-film transistors (TFT), constituted in such a manner that a semiconductor thin-film is formed on a cheap glass substrate has been rapidly developed. It is because the demand for active matrix semiconductor display devices (particularly, active matrix liquid crystal display devices) is growing.
An active matrix liquid crystal display device is constituted in such a manner that a TFT is disposed in each of several tens to several millions of picture element regions matrixwise disposed, and the electric charges entering and leaving each picture element electrode are controlled by the switching function of the TFT.
Among such active matrix liquid crystal display devices, a digital drive type active matrix liquid crystal display device which can be driven at high speed is attracting attention as display devices are becoming more and more fine and precise and their picture quality is more and more improved. The digital drive type active matrix liquid crystal display device includes a digital driver for processing digital data.
FIG. 15 shows a known digital drive type active matrix liquid crystal display device. This known digital drive type active matrix liquid crystal display device comprises a shift register 2001, data lines (a to d) 2002 to which digital data are inputted, latch circuits 1 (LAT1) 2003, latch circuits 2 (LAT2) 2004, a latch pulse line 2005, D/A converter circuits 2006, a gradation voltage lines 2007 for feeding a voltage to the D/A converter circuits 2006, source signal lines 2008, a shift register 2009 at the gate signal line side, gate signal lines (scanning lines) 2010, and picture element TFTs 2011. Here, a 4-bit digital drive type active matrix liquid crystal display device is shown by way of example. The latch circuits 1 and the latch circuits 2 (LAT1 and LAT2) are each shown in the state in which four latch circuits corresponding to the respective bits of the digital data are put together for convenience'sake.
In, e.g., Matsueda et al.: “Low Temperature Poly-Si TFT-LCD with integrated 6-bit Digital Data Drivers” (SID 96 DIGEST pp. 21 to 24), known digital drive type active matrix liquid crystal display devices are described.
In case of the known digital drive type active matrix liquid crystal display device shown in FIG. 15, the digital signals (digital video data) fed to the data lines (a to d) 2002 are written into the group of latch circuits (LAT1) one after another in accordance with the timing signals from the shift register.
The time spent until the writing of the digital signal into the LAT1 group is completely terminated is called one line period. In other words, the time interval from the point of time when the writing of the digital signals into the leftmost LAT1 is started to the point of time when the writing of the digital signals into the rightmost LAT1 is completed is one line period.
After the writing of the digital signals into the LAT1 group, the digital signals thus written into the LAT1 group are simultaneously sent out and written into the LAT2 group, when a latch pulse flows to the latch pulse line, in tune with the operating timing of the shift register.
Into the LAT1 group which has completely sent out the digital signals to the LAT2 group, the writing of digital signals is successively carried out again in accordance with the signals from the shift register.
During this second one-line period, a voltage corresponding to the digital signals sent out to the LAT2 group in step with the start of the second one-line period is fed to a source signal line. The driver referred to here by way of example executes the conversion of the digital signals to a gradation voltage by selecting one of 16 gradation voltages by the D/A converter circuits.
The thus selected gradation voltage is fed to the corresponding source signal line during one line. By the scanning signal from the shift register at the gate signal line side, the corresponding TFT is switched, whereby the liquid crystal molecules are driven.
By repeating the above-mentioned operation by a number of times corresponding to the number of the scanning lines, one frame is formed. In general, in an active matrix liquid crystal display device, pictures of 60 frames are re-written for one second.
As shown in FIG. 15, in the known digital driver, the data lines (a to d) 2002 to which digital data fed must feed the digital data to all the latch circuits 1 (2003), and thus, the laid-around length of the wirings of the data lines in the digital driver is very large. As a result, the load (the parasitic capacitance and resistance) of the data lines 2002 becomes large, so that the delay of the digital data, so-called the extended transition time of the digital data is increased.
By the use of the known digital driver, the display of pictures cannot be executed on the basis of accurate digital data, due to the above-mentioned delay of the digital data and the extended transition time of the digital data in some cases, and thus, good display could not be made in some cases.